Ingegneria Elettronica | ELECTRONIC CALCULATORS

cod. 0612400054

ELECTRONIC CALCULATORS

	0612400054
	DIPARTIMENTO DI INGEGNERIA INDUSTRIALE
	EQF6
	ELECTRONIC ENGINEERING
	2022/2023

PERCORSO IN COMMON

	OBBLIGATORIO
	YEAR OF COURSE 3
	YEAR OF DIDACTIC SYSTEM 2018
	SPRING SEMESTER

TEACHING UNITS

	SSD	CFU	HOURS	ACTIVITY	TYPE OF ACTIVITY
	INF/01	6	60	LESSONS	BASIC COMPULSORY SUBJECTS

EXAMS

Exam	Date	Session
CALCOLATORI ELETTRONICI	30/06/2023 - 09:00	SESSIONE ORDINARIA
CALCOLATORI ELETTRONICI	25/07/2023 - 09:00	SESSIONE ORDINARIA
CALCOLATORI ELETTRONICI	12/09/2023 - 09:00	SESSIONE DI RECUPERO

	Objectives
	THE AIM OF THIS COURSE IS TO PRESENT THE MODERN COMPUTER TECHNOLOGY. FOLLOWING THE INTRODUCTION OF ELEMENTS TO DESIGN SEQUENTIAL MACHINES, THE COURSE USES A MIPS PROCESSOR CORE TO PRESENT THE FUNDAMENTALS OF HARDWARE TECHNOLOGIES, ASSEMBLY LANGUAGE, COMPUTER ARITHMETIC, PIPELINING, MEMORY HIERARCHIES, AND I/O. PARALLELISM IS EXAMINED IN-DEPTH WITH EXAMPLES AND CONTENT HIGHLIGHTING PARALLEL HARDWARE AND SOFTWARE TOPICS. KNOWLEDGE AND UNDERSTANDING THE STUDENT AT THE END OF THE COURSE SHOULD BE ABLE TO UNDERSTAND THE MAIN FEATURES OF COMPUTER ARCHITECTURES. APPLYING KNOWLEDGE AND UNDERSTANDING STUDENTS WILL SHOW THE ABILITY TO UNDERSTAND THE KEY TECHNOLOGIES IN HARDWARE ARCHITECTURE AND HOW THE HIGH-LEVEL PROGRAMMING LANGUAGE IMPACTS ON THE PHYSICAL COMPUTER ARCHITECTURE. JUDGMENT AUTONOMY STUDENTS WILL ACQUIRE THE ABILITY TO SELECT THE BEST SOLUTION FOR SOLVING A GIVEN PROBLEM. IN PARTICULAR, THE WILL BE ABLE TO USE THE BASIC ELEMENTS FOR DESIGNING AND/OR EVALUATING THE PERFORMANCE OF COMPLEX SYSTEMS COMMUNICATIVE SKILLS AT THE END OF THE COURSE STUDENTS WILL ACQUIRE THE ABILITY TO COMMUNICATE TO AN AUDIENCE OF EXPERTS (AND NOT) INFORMATION, IDEAS, PROBLEMS AND SOLUTIONS IN THIS SPECIFIC FIELD. CAPACITY TO APPLY KNOWLEDGE THE COURSE AIMS TO DEVELOP STUDENTS' LEARNING ABILITIES TO ALLOW THEM TO CONTINUOUSLY UPDATE THEIR KNOWLEDGE AND SKILLS. STUDENTS SHOULD BE ABLE TO APPLY THE ACQUIRED KNOWLEDGE TO DIFFERENT CONTEXTS FROM THOSE PRESENTED DURING THE COURSE AND TO DEEPEN THE TOPICS DISCUSSED USING MATERIALS OTHER THAN THOSE PROPOSED

THE AIM OF THIS COURSE IS TO PRESENT THE MODERN COMPUTER TECHNOLOGY. FOLLOWING THE INTRODUCTION OF ELEMENTS TO DESIGN SEQUENTIAL MACHINES, THE COURSE USES A MIPS PROCESSOR CORE TO PRESENT THE FUNDAMENTALS OF HARDWARE TECHNOLOGIES, ASSEMBLY LANGUAGE, COMPUTER ARITHMETIC, PIPELINING, MEMORY HIERARCHIES, AND I/O. PARALLELISM IS EXAMINED IN-DEPTH WITH EXAMPLES AND CONTENT HIGHLIGHTING PARALLEL HARDWARE AND SOFTWARE TOPICS.

KNOWLEDGE AND UNDERSTANDING

THE STUDENT AT THE END OF THE COURSE SHOULD BE ABLE TO UNDERSTAND THE MAIN FEATURES OF COMPUTER ARCHITECTURES.

APPLYING KNOWLEDGE AND UNDERSTANDING

STUDENTS WILL SHOW THE ABILITY TO UNDERSTAND THE KEY TECHNOLOGIES IN HARDWARE ARCHITECTURE AND HOW THE HIGH-LEVEL PROGRAMMING LANGUAGE IMPACTS ON THE PHYSICAL COMPUTER ARCHITECTURE.

JUDGMENT AUTONOMY

STUDENTS WILL ACQUIRE THE ABILITY TO SELECT THE BEST SOLUTION FOR SOLVING A GIVEN PROBLEM. IN PARTICULAR, THE WILL BE ABLE TO USE THE BASIC ELEMENTS FOR DESIGNING AND/OR EVALUATING THE PERFORMANCE OF COMPLEX SYSTEMS

COMMUNICATIVE SKILLS

AT THE END OF THE COURSE STUDENTS WILL ACQUIRE THE ABILITY TO COMMUNICATE TO AN AUDIENCE OF EXPERTS (AND NOT) INFORMATION, IDEAS, PROBLEMS AND SOLUTIONS IN THIS SPECIFIC FIELD.

CAPACITY TO APPLY KNOWLEDGE

THE COURSE AIMS TO DEVELOP STUDENTS' LEARNING ABILITIES TO ALLOW THEM TO CONTINUOUSLY UPDATE THEIR KNOWLEDGE AND SKILLS. STUDENTS SHOULD BE ABLE TO APPLY THE ACQUIRED KNOWLEDGE TO DIFFERENT CONTEXTS FROM THOSE PRESENTED DURING THE COURSE AND TO DEEPEN THE TOPICS DISCUSSED USING MATERIALS OTHER THAN THOSE PROPOSED

	Prerequisites
	Introduction to Computer Science

	Contents
	FUNDAMENTALS OF COMPUTER DESIGN: BOOLEAN ALGEBRA, COMBINATORIAL AND SEQUENTIAL MACHINES, DIGITAL SYSTEMS. THEORY: 10 HOURS EXERCISE: 10 HOURS COMPUTER ARCHITECTURE: COMPUTER ORGANIZATION, PEFORMANCE, INSTRUCTION SET AND ADDRESSING MODE, ASSEMBLY LANGUAGE AND PROGRAMMING. THEORY: 5 HOURS EXERCISE: 5 HOURS DATA PATH AND CONTROL UNIT. ARITHMETIC LOGIC UNIT. THEORY: 5 HOURS EXERCISE: 5 HOURS INTERRUPT MANAGEMENT, INPUT/OUTPUT. MEMORY HIERARCHY. PIPELINING. THEORY: 10 HOURS EXERCISE 10 HOURS

Contents

FUNDAMENTALS OF COMPUTER DESIGN: BOOLEAN ALGEBRA, COMBINATORIAL AND SEQUENTIAL MACHINES, DIGITAL SYSTEMS. THEORY: 10 HOURS EXERCISE: 10 HOURS

COMPUTER ARCHITECTURE: COMPUTER ORGANIZATION, PEFORMANCE, INSTRUCTION SET AND ADDRESSING MODE, ASSEMBLY LANGUAGE AND PROGRAMMING. THEORY: 5 HOURS EXERCISE: 5 HOURS

DATA PATH AND CONTROL UNIT. ARITHMETIC LOGIC UNIT. THEORY: 5 HOURS EXERCISE: 5 HOURS

INTERRUPT MANAGEMENT, INPUT/OUTPUT. MEMORY HIERARCHY. PIPELINING. THEORY: 10 HOURS EXERCISE 10 HOURS

	Teaching Methods
	THE COURSE INCLUDES CLASSROOM LECTURES AIMED AT PRESENTING THE THEORY AND NUMERICAL EXCERCISES TO STRENGTHEN THE OPERATIONAL SKILLS. THE EXERCISES ASSIGNED TO STUDENTS ARE SOLVED IN CLASS BY THE TEACHER USING THE TECHNIQUES PRESENTED IN THEORY LECTURES. THE EXCERCISES ARE LED BY THE TEACHER TO DEVELOP THE STUDENT'S ABILITY TO IDENTIFY THE MOST APPROPRIATE SOLUTION TECHNIQUES AND PRESENT THE RESULTS IN A CLEAR AND EFFICIENT WAY.

Teaching Methods

THE COURSE INCLUDES CLASSROOM LECTURES AIMED AT PRESENTING THE THEORY AND NUMERICAL EXCERCISES TO STRENGTHEN THE OPERATIONAL SKILLS. THE EXERCISES ASSIGNED TO STUDENTS ARE SOLVED IN CLASS BY THE TEACHER USING THE TECHNIQUES PRESENTED IN THEORY LECTURES. THE EXCERCISES ARE LED BY THE TEACHER TO DEVELOP THE STUDENT'S ABILITY TO IDENTIFY THE MOST APPROPRIATE SOLUTION TECHNIQUES AND PRESENT THE RESULTS IN A CLEAR AND EFFICIENT WAY.

	Verification of learning
	THE ASSESSMENT OF THE ACHIEVEMENT OF LEARNING OBJECTIVES IS CARRIED OUT BY A WRITTEN AND AN ORAL TEST. A MININUM GRADE OF 18/30 HAS TO BE OBTAINED AT THE WRITTEN TEST TO PROCEED TO THE ORAL EXAM. PARTIAL (WRITTEN) TESTS ARE ORGANIZED DURING THE COURSE PERIOD. IN CASE OF POSITIVE RESULTS, THEY ALLOW ADMISSION TO THE ORAL TEST. THE WRITTEN TEST IS DESIGNED TO EVALUATE THE OPERATIONAL CAPABILITIES IN DESIGNING SEQUENTIAL MACHINES THE ORAL EXAMINATION IS AIMED AT VERIFYING THE LEVEL OF THE THEORETICAL KNOWLEDGE AND SKILLS GAINED BY THE STUDENT. THE FINAL SCORE IS OBTAINED BY THE AVERAGE OF THE TWO TESTS.

Verification of learning

THE ASSESSMENT OF THE ACHIEVEMENT OF LEARNING OBJECTIVES IS CARRIED OUT BY A WRITTEN AND AN ORAL TEST. A MININUM GRADE OF 18/30 HAS TO BE OBTAINED AT THE WRITTEN TEST TO PROCEED TO THE ORAL EXAM. PARTIAL (WRITTEN) TESTS ARE ORGANIZED DURING THE COURSE PERIOD. IN CASE OF POSITIVE RESULTS, THEY ALLOW ADMISSION TO THE ORAL TEST.

THE WRITTEN TEST IS DESIGNED TO EVALUATE THE OPERATIONAL CAPABILITIES IN DESIGNING SEQUENTIAL MACHINES

THE ORAL EXAMINATION IS AIMED AT VERIFYING THE LEVEL OF THE THEORETICAL KNOWLEDGE AND SKILLS GAINED BY THE STUDENT.
THE FINAL SCORE IS OBTAINED BY THE AVERAGE OF THE TWO TESTS.

	Texts
	PATTERSON AND HENNESSY, STRUTTURA E PROGETTO DEI CALCOLATORI, QUINTA EDIZIONE, ZANICHELLI EDITORE, 2022

	More Information
	ADDITIONAL MATERIALS (SUCH AS TRANSPARENCIES) ARE AVAILABLE ON THE WEBSITE DEDICATED TO THE COURSE AND ACCESSIBLE FROM THE TEACHER'S OFFICIAL WEB PAGE.

Lessons Timetable

BETA VERSION Data source ESSE3 [Ultima Sincronizzazione: 2023-05-23]